1. Field of the Invention
This invention relates to a method for fabricating an ohmic electrode and to a multi-layered structure for fabricating an ohmic electrode suitable for, in particular, III-V compound semiconductors.
2. Description of the Related Art
Decrease in contact resistance of ohmic electrodes and improvement of their thermal stability are important issues for implementation of high performance and reliability of devices such as FETs using compound semiconductors. So far, however, no satisfactory ohmic electrodes are available for compound semiconductors, in particular, GaAs or other III-V compound semiconductors.
At present, the most frequently used material of ohmic electrodes for GaAs semiconductors is AuGe/Ni. The use of AuGe/Ni as the material of ohmic electrodes makes it possible to fabricate ohmic electrodes in ohmic contact with GaAs semiconductors by annealing at 400 to 500.degree. C.
The most serious problem with the use of AuGe/Ni as the material of ohmic electrodes is that the thermal instability of the ohmic electrodes fabricated with the material. That is, since AuGe/Ni contains a great amount of Au (88% of typically used AuGe), Au reacts with GaAs at a temperature of or above 400.degree. C., and makes .beta.-AuGa (of a hexagonal close packed (HCP) structure with melting point T.sub.m =375.degree. C.), which causes deterioration of the thermal stability even though contributing to a decrease in contact resistance of the ohmic electrode. It results in inviting deterioration of device characteristics due to high temperature processes such as chemical vapor deposition (CVD) executed after formation of the ohmic electrode.
This problem is explained below by taking a specific JFET manufacturing process with reference to FIG. 1. That is, in this manufacturing process, an n-type channel layer 102 is first formed in a semi-insulating GaAs substrate 101 as shown in FIG. 1A by selective ion implantation of an n-type impurity and subsequent annealing. Then, an insulating film 103, such as Si.sub.3 N.sub.4 film, is deposited on the entire surface of the semi-insulating GaAs substrate 101, and selectively removed by etching to form an opening 103a. After that, a p-type impurity, Zn, is diffused into the n-type channel layer 102 through the opening 103a to make a p.sup.+ -type gate region 104. Next, as shown in FIG. 1B, after the insulating film 103 is selectively removed by etching to make openings 103b, 103c, ohmic electrodes 105, 106, 107 are fabricated on the n-type channel layer 102 accessed through the openings 103a, 103b, 103c by using AuGe/Ni as their material. Next, as shown in FIG. 1C, first-layer wirings 108, 109 respectively coupled to the ohmic electrodes 106, 107 are made. Next, as shown in FIG. 1D, an inter-layer insulating film 110, such as Si.sub.3 N.sub.4 film, is deposited by a CVD method on the entire surface to provide electrical insulation from second-layer wiring, referred to later, and selectively removed by etching to make openings 110a, 110b. A high temperature near 400.degree. C. is applied in this step of depositing the inter-layer insulating film 110 by a CVD method, and deteriorates the device characteristics. To make the second-layer wiring, a resist 111, for example, is applied to the surface except for areas for contacts of the second-layer wiring. After a material for the second-layer wiring is applied on the entire surface, the resist 111 is removed. As a result, second-layer wirings 112, 113 are obtained in the form of air bridge wiring as shown in FIG. 1E.
Apart from the above-indicated problem, the use of AuGe/Ni as the material of the ohmic electrode causes .beta.-AuGa produced by reaction between GaAs and Au. .beta.-AuGa coarsens the surface of the ohmic electrode and makes subsequent fine working difficult.
Studies have so far been made on various materials for ohmic electrodes to overcome these problems. The most ideal approach from the viewpoint of ohmic contact is to establish ohmic contact by using metal which lowers the energy barrier at the interface with an electrode metal and does not contain a compound with a low melting point, such as .beta.-AuGa, as shown in FIG. 2 in which EC is bottom energy of the conduction band, Ev is top energy of the valence band, and EF is the Fermi energy. This structure of ohmic electrode is obtained by epitaxially growing an In.sub.x Ga.sub.1-x As layer as an intermediate layer with a low energy barrier on a GaAs substrate by a metallorganic chemical vapor deposition (MOCVD) method, for example, and by providing an electrode metal on the layer. However, the use of an epitaxial growth equipment, such as MOCVD apparatus, to make the structure of ohmic electrode reduces the process window and degrades the mass productivity.
There is a report, directed to solution of these problems, which proposes to make on a GaAs substrate a multi-layered structure, such as InAs/W, InAs/Ni/W, Ni/InAs/Ni/W, and so forth, by depositing the intermediate InAs layer with a low energy barrier by a sputtering method using InAs as the target and by depositing the W and Ni films by an electron beam evaporation method and to apply subsequent annealing, which is said to result in obtaining an ohmic electrode having a good thermal stability (J. Appl. Phys. 68. 2475(1990)). FIG. 3 shows one of such examples in which the ohmic electrode is fabricated by depositing an InAs layer 201 on an n-type GaAs substrate 200 by a sputtering method, then depositing a Ni film 202 and a W film 203 sequentially on the InAs layer 201, and later annealing the structure.
This method is quite excellent in mass productivity because of using a sputtering method which can make the InAs layer 201 at a high speed. In addition, since the ohmic electrode uses the W film 203 which is a refractory metal as its top layer, which permits any kind of metals like Al, Au, and so on, to be used as the material of metallization for connection to the ohmic electrode without using a barrier metal, the design allows a wide choice in the process sequence. Nevertheless, this method still involves the serious problem that impossibility of introducing an impurity as the donor into the InAs layer 201, diffusion of a slight amount of In on the W film 203 during annealing, and other like factors, disturb realization of a sufficiently low contact resistance. There is also an additional problem that diffusion of In on the W film 203 during annealing coarsens the surface of the ohmic electrode and significantly degrades its morphology.
Only having currently existing ohmic electrodes with unsatisfactory properties for use on GaAs semiconductors, realization of an ohmic electrode with satisfactory characteristics has been waited for.